Globally Asynchronous Elastic Logic Synthesis (GAELS)

Lead Research Organisation: Newcastle University
Department Name: Electrical, Electronic & Computer Eng

Abstract

This project will develop an integrated theoretical and practical foundation for new methods and CAD tools to support the design of various types of systems with mixed synchronous-asynchronous operation. The crucial novelty will be in the use of the Elastic Logic principles when arranging interaction between blocks, partitioning the system into multi-block components ('localities').It will for the first time provide a pragmatic way of automating the design of mixed synchronous-asynchronous systems with varying granularity level, thereby leading to the development and application of systematic optimization techniques to obtain solutions targeted at the key design issues for deep submicron DSM and 3D implementation technologies, such as process variation power dissipation, area and speed.

The project will deliver new theoretical models and algorithms for data-flow representation of systems for timing and power elasticity, automated partitioning of globally synchronous systems into subsystems with local synchronism, automated conversion of systems to elastic form and introduction of asynchronous protocols, design of synchronous-asynchronous interfaces and integration of the new methods into an appropriate industrial CAD environment. The new methods will be tested using an advanced case study from the industrial collaborators, using an advanced DSM technology.

Planned Impact

The main beneficiaries of this research are those companies and organisations engaged in either the design or implementation of systems using deep sub-micron technologies, or EDA tool suppliers to these organisations, or research institutes who wish to remain at forefront in the transfer of leading-edge technology.

Identifiable commercial and public-sector beneficiaries which are able to use the project results immediately through collaborative links include:
* Infineon Technologies, a major European technology innovator, is supporting our proposal, see the letter of support written by Dr Christoph Heer Christoph Heer, Vice President Digital IP & Re-Use.
* IHP, a major European research centre is also supporting the vision of this research and would look to exploit it in their leading edge wireless products.
* i-GXL, a spin-out company founded by members of the MSD group at Newcastle led by A.Yakovlev, working on developing licensable (cryptographic and data compression) accelerator IPs for SoCs in healthcare and security markets.
* KTA project "Crossing the Clinical Boundary", placed at Durham/Newcastle, with direct links with practicing heart surgeons and electro-physiologists (Dr A.Owens and Dr N.Linker) will closely interact with the project for supporting a new design technology for development of an ECG HealthCare SoC (ECHO).
* ARM, the world leader in the market of low-power IP cores. The academic partners have strong on-going links with ARM who have maintained an interest in our technology and have a strong record of employing our research staff. There are similar links with NXP.
* Employed research staff will be exposed to advanced CAD tools and semiconductor technologies and be extremely employable within the UK system design industry.

Indirect beneficiaries include:
* The consumer who has an expectation of continuing performance (speed, battery-life, capabilities) that can only be sustained by the exploitation of ever advanced sub-micron technologies.
* The ICT system design industry where synchronisation and distribution, with modelling, validation, timing aspects are crucial support the creation of advanced products.

According to the ITRS, the proportion of asynchronous or self-timed circuitry in systems will increase significantly in various guises (e.g. GALS systems) in future years. The drivers behind this radical change in design methodology will be mainly the dominance of statistical variation in device parameters at deep sub-micron geometries and global interconnect issues.

The system-on-chip design industry is of major importance to the UK economy. The results of this work will establish an enabling technology that will allow UK industry to best exploit advanced semiconductor fabrication.

The combination of exposure to advanced ECAD tools and semiconductor technology kits in real system designs, together with the development of leading-edge theoretical foundations and supporting tools will provide highly skilled personnel at post doctoral level.

Publications


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Burns F (2016) A Structured Visual Approach to GALS Modelling and Verification of Communication Circuits in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Burns F. (2015) GALS synthesis and verification for xMAS models in Proceedings -Design, Automation and Test in Europe, DATE
Fernandes Johnson (2015) Persistent and Nonviolent Steps and the Design of GALS Systems in FUNDAMENTA INFORMATICAE
Golubcovs S (2013) Concurrent Multiresource Arbiter: Design and Applications in IEEE Transactions on Computers
Guido J (2015) Design of Self-Timed Reconfigurable Controllers for Parallel Synchronization via Wagging in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
 
Description The project has led to developing better understanding of the concept of Globally Asynchronous Locally Synchronous (GALS) Systems. It shows the role of the criteria associated with functional and communication-centric criteria for partitioning of complex SoCs into locally synchronous localities, in contrast with the previously dominating physical criteria.
Exploitation Route These findings can be used at both theoretical level, as well as through the use of tools within the Workcraft toolkit, namely http://workcraft.org
Sectors Digital/Communication/Information Technologies (including Software),Electronics
URL http://async.org.uk